hardware specs mandatory in auction creation msg

master
michael 2022-09-22 23:01:31 +00:00
parent 0b040b4334
commit 98c082693d
2 changed files with 244 additions and 33 deletions

View File

@ -5,6 +5,8 @@ package colinear.colinearcore;
option go_package = "colinear/x/colinearcore/types";
import "colinearcore/hardware.proto";
// Msg defines the Msg service.
service Msg {
rpc NewAuction(MsgNewAuction) returns (MsgNewAuctionResponse);
@ -26,6 +28,13 @@ message MsgNewAuction {
// verified providers just specifies who's allowed to bid on the lease auction.
// STORED IN MEMORY. DOES NOT GET WRITTEN TO CHAIN STATE.
repeated string verifiedProviders = 7;
// hardware specs (mandatory)
repeated string gpus = 8;
uint64 cpuCores = 9;
CpuArchitecture cpuArch = 10;
uint64 memMb = 11;
uint64 storageGb = 12;
}
message MsgNewAuctionResponse {

View File

@ -37,6 +37,12 @@ type MsgNewAuction struct {
// verified providers just specifies who's allowed to bid on the lease auction.
// STORED IN MEMORY. DOES NOT GET WRITTEN TO CHAIN STATE.
VerifiedProviders []string `protobuf:"bytes,7,rep,name=verifiedProviders,proto3" json:"verifiedProviders,omitempty"`
// hardware specs (mandatory)
Gpus []string `protobuf:"bytes,8,rep,name=gpus,proto3" json:"gpus,omitempty"`
CpuCores uint64 `protobuf:"varint,9,opt,name=cpuCores,proto3" json:"cpuCores,omitempty"`
CpuArch CpuArchitecture `protobuf:"varint,10,opt,name=cpuArch,proto3,enum=colinear.colinearcore.CpuArchitecture" json:"cpuArch,omitempty"`
MemMb uint64 `protobuf:"varint,11,opt,name=memMb,proto3" json:"memMb,omitempty"`
StorageGb uint64 `protobuf:"varint,12,opt,name=storageGb,proto3" json:"storageGb,omitempty"`
}
func (m *MsgNewAuction) Reset() { *m = MsgNewAuction{} }
@ -121,6 +127,41 @@ func (m *MsgNewAuction) GetVerifiedProviders() []string {
return nil
}
func (m *MsgNewAuction) GetGpus() []string {
if m != nil {
return m.Gpus
}
return nil
}
func (m *MsgNewAuction) GetCpuCores() uint64 {
if m != nil {
return m.CpuCores
}
return 0
}
func (m *MsgNewAuction) GetCpuArch() CpuArchitecture {
if m != nil {
return m.CpuArch
}
return CpuArchitecture_ANY
}
func (m *MsgNewAuction) GetMemMb() uint64 {
if m != nil {
return m.MemMb
}
return 0
}
func (m *MsgNewAuction) GetStorageGb() uint64 {
if m != nil {
return m.StorageGb
}
return 0
}
type MsgNewAuctionResponse struct {
AuctionId string `protobuf:"bytes,1,opt,name=auctionId,proto3" json:"auctionId,omitempty"`
}
@ -623,39 +664,45 @@ func init() {
func init() { proto.RegisterFile("colinearcore/tx.proto", fileDescriptor_0c3854a2a9bba3b4) }
var fileDescriptor_0c3854a2a9bba3b4 = []byte{
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}
// Reference imports to suppress errors if they are not otherwise used.
@ -938,6 +985,35 @@ func (m *MsgNewAuction) MarshalToSizedBuffer(dAtA []byte) (int, error) {
_ = i
var l int
_ = l
if m.StorageGb != 0 {
i = encodeVarintTx(dAtA, i, uint64(m.StorageGb))
i--
dAtA[i] = 0x60
}
if m.MemMb != 0 {
i = encodeVarintTx(dAtA, i, uint64(m.MemMb))
i--
dAtA[i] = 0x58
}
if m.CpuArch != 0 {
i = encodeVarintTx(dAtA, i, uint64(m.CpuArch))
i--
dAtA[i] = 0x50
}
if m.CpuCores != 0 {
i = encodeVarintTx(dAtA, i, uint64(m.CpuCores))
i--
dAtA[i] = 0x48
}
if len(m.Gpus) > 0 {
for iNdEx := len(m.Gpus) - 1; iNdEx >= 0; iNdEx-- {
i -= len(m.Gpus[iNdEx])
copy(dAtA[i:], m.Gpus[iNdEx])
i = encodeVarintTx(dAtA, i, uint64(len(m.Gpus[iNdEx])))
i--
dAtA[i] = 0x42
}
}
if len(m.VerifiedProviders) > 0 {
for iNdEx := len(m.VerifiedProviders) - 1; iNdEx >= 0; iNdEx-- {
i -= len(m.VerifiedProviders[iNdEx])
@ -1366,6 +1442,24 @@ func (m *MsgNewAuction) Size() (n int) {
n += 1 + l + sovTx(uint64(l))
}
}
if len(m.Gpus) > 0 {
for _, s := range m.Gpus {
l = len(s)
n += 1 + l + sovTx(uint64(l))
}
}
if m.CpuCores != 0 {
n += 1 + sovTx(uint64(m.CpuCores))
}
if m.CpuArch != 0 {
n += 1 + sovTx(uint64(m.CpuArch))
}
if m.MemMb != 0 {
n += 1 + sovTx(uint64(m.MemMb))
}
if m.StorageGb != 0 {
n += 1 + sovTx(uint64(m.StorageGb))
}
return n
}
@ -1758,6 +1852,114 @@ func (m *MsgNewAuction) Unmarshal(dAtA []byte) error {
}
m.VerifiedProviders = append(m.VerifiedProviders, string(dAtA[iNdEx:postIndex]))
iNdEx = postIndex
case 8:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field Gpus", wireType)
}
var stringLen uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowTx
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
stringLen |= uint64(b&0x7F) << shift
if b < 0x80 {
break
}
}
intStringLen := int(stringLen)
if intStringLen < 0 {
return ErrInvalidLengthTx
}
postIndex := iNdEx + intStringLen
if postIndex < 0 {
return ErrInvalidLengthTx
}
if postIndex > l {
return io.ErrUnexpectedEOF
}
m.Gpus = append(m.Gpus, string(dAtA[iNdEx:postIndex]))
iNdEx = postIndex
case 9:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field CpuCores", wireType)
}
m.CpuCores = 0
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowTx
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
m.CpuCores |= uint64(b&0x7F) << shift
if b < 0x80 {
break
}
}
case 10:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field CpuArch", wireType)
}
m.CpuArch = 0
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowTx
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
m.CpuArch |= CpuArchitecture(b&0x7F) << shift
if b < 0x80 {
break
}
}
case 11:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field MemMb", wireType)
}
m.MemMb = 0
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowTx
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
m.MemMb |= uint64(b&0x7F) << shift
if b < 0x80 {
break
}
}
case 12:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field StorageGb", wireType)
}
m.StorageGb = 0
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowTx
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
m.StorageGb |= uint64(b&0x7F) << shift
if b < 0x80 {
break
}
}
default:
iNdEx = preIndex
skippy, err := skipTx(dAtA[iNdEx:])